Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10353	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8985	1			T3	30		T13	19		T15	17
len_5001_7500	14670	1			T3	30		T13	18		T15	17
len_2501_5000	9298	1			T3	30		T13	18		T15	17
len_1025_2500	5458	1			T3	16		T13	11		T15	10
len_769_1024	6177	1			T1	34		T3	4		T12	28
len_513_768	6622	1			T1	41		T2	1		T3	2
len_257_512	21039	1			T1	46		T2	1		T3	244
len_0_256	256853	1			T1	36		T3	1897		T12	31
len_keccak_block_sizes[72]	727	1			T3	3		T13	2		T15	2
len_keccak_block_sizes[104]	621	1			T3	3		T12	1		T13	2
len_keccak_block_sizes[136]	526	1			T3	3		T13	2		T15	2
len_keccak_block_sizes[144]	416	1			T3	3		T15	2		T82	3
len_keccak_block_sizes[168]	322	1			T3	3		T82	3		T157	3
len_1	751	1			T3	3		T13	2		T15	2
len_0	1189	1			T3	3		T13	2		T15	2