Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	637	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5365	1			T1	23		T12	10		T16	24
len_601_800	12697	1			T1	60		T2	1		T12	47
len_401_600	8218	1			T1	35		T12	39		T16	38
len_201_400	16532	1			T1	18		T2	1		T12	17
len_65_200	73406	1			T1	11		T3	685		T12	6
len_min_for_xof_require_squeeze	1009	1			T3	9		T16	1		T82	9
len_keccak_block_sizes[72]	757	1			T3	9		T82	9		T113	1
len_keccak_block_sizes[104]	754	1			T3	9		T82	9		T157	5
len_keccak_block_sizes[136]	744	1			T3	9		T82	9		T113	1
len_keccak_block_sizes[144]	285	1			T125	1		T157	5		T188	5
len_keccak_block_sizes[168]	287	1			T24	2		T113	1		T157	5
len_datapath_width	14045	1			T3	9		T14	3		T16	1
len_2_63	213846	1			T1	7		T2	3		T3	1643
len_1	41	1			T24	1		T129	1		T189	1