Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10355	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8991	1			T3	17		T4	24		T18	30
len_5001_7500	14372	1			T3	17		T4	56		T18	30
len_2501_5000	9289	1			T3	17		T4	13		T18	30
len_1025_2500	5438	1			T3	10		T4	4		T18	16
len_769_1024	6263	1			T1	34		T3	2		T4	1
len_513_768	6842	1			T1	38		T3	2		T4	1
len_257_512	21264	1			T1	29		T3	2		T4	1
len_0_256	258085	1			T1	25		T3	290		T4	13
len_keccak_block_sizes[72]	729	1			T1	1		T3	2		T14	1
len_keccak_block_sizes[104]	625	1			T3	2		T14	1		T18	3
len_keccak_block_sizes[136]	525	1			T3	2		T18	3		T19	2
len_keccak_block_sizes[144]	419	1			T3	2		T18	3		T69	1
len_keccak_block_sizes[168]	328	1			T18	3		T29	1		T69	1
len_1	760	1			T3	2		T18	3		T19	2
len_0	1174	1			T3	2		T4	1		T18	3