Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	678	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5589	1			T1	22		T4	22		T13	8
len_601_800	12608	1			T1	53		T4	36		T13	12
len_401_600	8438	1			T1	28		T4	40		T13	5
len_201_400	16493	1			T1	14		T4	5		T13	4
len_65_200	73947	1			T1	7		T4	6		T13	1
len_min_for_xof_require_squeeze	1004	1			T18	9		T71	1		T130	1
len_keccak_block_sizes[72]	762	1			T18	9		T71	2		T193	9
len_keccak_block_sizes[104]	754	1			T1	1		T18	9		T41	1
len_keccak_block_sizes[136]	764	1			T18	9		T71	2		T193	9
len_keccak_block_sizes[144]	288	1			T16	1		T194	5		T76	5
len_keccak_block_sizes[168]	290	1			T71	2		T194	5		T105	1
len_datapath_width	14133	1			T4	1		T14	1		T18	9
len_2_63	214912	1			T1	41		T3	390		T4	2
len_1	45	1			T26	1		T137	1		T72	1