Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10352	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9064	1			T15	2		T17	38		T19	24
len_5001_7500	14305	1			T15	5		T17	36		T19	24
len_2501_5000	9270	1			T17	36		T19	24		T76	30
len_1025_2500	5440	1			T17	22		T19	14		T76	16
len_769_1024	6166	1			T1	28		T4	35		T5	11
len_513_768	6446	1			T1	36		T4	30		T5	13
len_257_512	20966	1			T1	33		T4	43		T5	13
len_0_256	257627	1			T1	36		T4	86		T5	19
len_keccak_block_sizes[72]	719	1			T17	3		T19	2		T76	3
len_keccak_block_sizes[104]	625	1			T17	3		T19	2		T76	3
len_keccak_block_sizes[136]	524	1			T1	1		T17	3		T76	3
len_keccak_block_sizes[144]	422	1			T17	3		T76	3		T180	3
len_keccak_block_sizes[168]	314	1			T17	3		T76	3		T180	3
len_1	759	1			T4	1		T17	3		T18	2
len_0	1217	1			T1	1		T4	1		T17	3