Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
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Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 0 15 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
msg_len 15 0 15 100.00 100 1 1 0


Summary for Variable msg_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 15 0 15 100.00


User Defined Bins for msg_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 10351 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_7501_10000 9316 1 T1 17 T14 11 T16 24
len_5001_7500 15040 1 T1 17 T2 33 T13 33
len_2501_5000 9432 1 T1 17 T2 34 T13 34
len_1025_2500 5489 1 T1 10 T2 20 T13 20
len_769_1024 6357 1 T1 2 T2 4 T3 13
len_513_768 6767 1 T1 2 T2 3 T3 9
len_257_512 21168 1 T1 2 T2 4 T3 12
len_0_256 258575 1 T1 290 T2 148 T3 19
len_keccak_block_sizes[72] 717 1 T1 2 T2 2 T13 2
len_keccak_block_sizes[104] 624 1 T1 2 T16 2 T18 3
len_keccak_block_sizes[136] 533 1 T1 2 T15 1 T18 3
len_keccak_block_sizes[144] 426 1 T1 2 T14 1 T18 3
len_keccak_block_sizes[168] 328 1 T18 3 T90 3 T92 3
len_1 760 1 T1 2 T2 2 T13 2
len_0 1221 1 T1 2 T2 2 T13 2

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