Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	694	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5752	1			T3	10		T14	31		T15	36
len_601_800	13178	1			T3	15		T14	53		T15	59
len_401_600	8583	1			T3	14		T14	28		T15	46
len_201_400	16629	1			T3	9		T14	14		T15	15
len_65_200	74174	1			T3	4		T14	75		T15	10
len_min_for_xof_require_squeeze	1014	1			T14	1		T18	9		T37	1
len_keccak_block_sizes[72]	750	1			T14	1		T18	9		T90	5
len_keccak_block_sizes[104]	754	1			T14	1		T18	9		T90	5
len_keccak_block_sizes[136]	753	1			T15	1		T18	9		T38	1
len_keccak_block_sizes[144]	296	1			T38	1		T90	5		T92	5
len_keccak_block_sizes[168]	288	1			T14	1		T38	1		T90	5
len_datapath_width	14102	1			T2	246		T13	246		T14	22
len_2_63	215231	1			T1	390		T3	32		T14	145
len_1	59	1			T14	2		T188	1		T189	1