Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10350	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9445	1			T1	25		T2	19		T14	6
len_5001_7500	15279	1			T1	54		T2	50		T14	5
len_2501_5000	9455	1			T1	12		T2	6		T14	1
len_1025_2500	5534	1			T1	5		T2	5		T15	20
len_769_1024	6083	1			T1	2		T2	2		T13	23
len_513_768	6535	1			T1	1		T2	2		T13	26
len_257_512	20756	1			T1	5		T2	4		T13	33
len_0_256	257251	1			T1	21		T2	10		T13	26
len_keccak_block_sizes[72]	732	1			T15	2		T16	2		T39	3
len_keccak_block_sizes[104]	621	1			T17	1		T39	3		T40	2
len_keccak_block_sizes[136]	517	1			T39	3		T89	3		T90	3
len_keccak_block_sizes[144]	419	1			T39	3		T89	3		T90	3
len_keccak_block_sizes[168]	326	1			T39	3		T89	3		T90	3
len_1	760	1			T15	2		T16	2		T39	3
len_0	1256	1			T1	3		T2	1		T14	1