Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	685	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5686	1			T1	16		T2	22		T13	9
len_601_800	12771	1			T1	50		T2	28		T13	33
len_401_600	8568	1			T1	24		T2	27		T13	33
len_201_400	16590	1			T1	16		T2	12		T13	16
len_65_200	73721	1			T1	11		T2	3		T13	11
len_min_for_xof_require_squeeze	1016	1			T39	10		T89	10		T90	9
len_keccak_block_sizes[72]	742	1			T39	5		T23	1		T89	5
len_keccak_block_sizes[104]	751	1			T1	1		T19	1		T39	5
len_keccak_block_sizes[136]	757	1			T1	1		T39	5		T82	1
len_keccak_block_sizes[144]	285	1			T39	5		T82	2		T23	1
len_keccak_block_sizes[168]	275	1			T39	5		T82	1		T89	5
len_datapath_width	14076	1			T15	246		T16	246		T18	3
len_2_63	214174	1			T1	7		T2	5		T3	82
len_1	48	1			T23	1		T92	2		T185	1