Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10351	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8986	1			T14	17		T17	30		T19	19
len_5001_7500	14667	1			T2	2		T14	17		T17	30
len_2501_5000	9277	1			T14	17		T17	30		T18	34
len_1025_2500	5509	1			T14	10		T17	16		T18	20
len_769_1024	6055	1			T2	51		T14	2		T15	46
len_513_768	6392	1			T2	52		T4	2		T14	2
len_257_512	20948	1			T2	48		T4	1		T14	2
len_0_256	257690	1			T2	166		T14	290		T15	51
len_keccak_block_sizes[72]	723	1			T14	2		T17	3		T18	2
len_keccak_block_sizes[104]	620	1			T14	2		T17	3		T20	2
len_keccak_block_sizes[136]	532	1			T14	2		T17	3		T20	2
len_keccak_block_sizes[144]	421	1			T14	2		T17	3		T20	2
len_keccak_block_sizes[168]	325	1			T15	1		T17	3		T82	3
len_1	754	1			T14	2		T17	3		T18	2
len_0	1230	1			T14	2		T17	3		T18	2