Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10351	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9101	1			T1	19		T2	24		T3	17
len_5001_7500	14687	1			T1	18		T2	24		T3	17
len_2501_5000	9351	1			T1	18		T2	24		T3	17
len_1025_2500	5425	1			T1	11		T2	14		T3	10
len_769_1024	6531	1			T1	2		T2	2		T3	2
len_513_768	6892	1			T1	2		T2	3		T3	2
len_257_512	21241	1			T1	2		T2	2		T3	2
len_0_256	258108	1			T1	274		T2	211		T3	290
len_keccak_block_sizes[72]	721	1			T1	2		T2	2		T3	2
len_keccak_block_sizes[104]	620	1			T1	2		T2	2		T3	2
len_keccak_block_sizes[136]	524	1			T1	2		T3	2		T13	2
len_keccak_block_sizes[144]	423	1			T3	2		T13	2		T47	2
len_keccak_block_sizes[168]	322	1			T96	3		T123	3		T49	1
len_1	750	1			T1	2		T2	2		T3	2
len_0	1193	1			T1	2		T2	2		T3	2