Summary for Variable entropy_edn_mode_enabled
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for entropy_edn_mode_enabled
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
372238 | 
1 | 
 | 
 | 
T1 | 
4674 | 
 | 
T2 | 
2 | 
 | 
T3 | 
2 | 
| auto[1] | 
326582 | 
1 | 
 | 
 | 
T2 | 
86 | 
 | 
T3 | 
298 | 
 | 
T17 | 
324 | 
Summary for Variable prescaler_val
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
3 | 
0 | 
3 | 
100.00 | 
User Defined Bins for prescaler_val
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| higher_val | 
174785 | 
1 | 
 | 
 | 
T1 | 
1112 | 
 | 
T2 | 
18 | 
 | 
T3 | 
62 | 
| lower_val | 
173045 | 
1 | 
 | 
 | 
T1 | 
1129 | 
 | 
T2 | 
18 | 
 | 
T3 | 
83 | 
| zero_val | 
1840 | 
1 | 
 | 
 | 
T1 | 
13 | 
 | 
T2 | 
1 | 
 | 
T3 | 
1 | 
Summary for Variable wait_timer_val
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
3 | 
0 | 
3 | 
100.00 | 
User Defined Bins for wait_timer_val
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| higher_val | 
348760 | 
1 | 
 | 
 | 
T1 | 
2324 | 
 | 
T2 | 
38 | 
 | 
T3 | 
148 | 
| lower_val | 
350046 | 
1 | 
 | 
 | 
T1 | 
2350 | 
 | 
T2 | 
50 | 
 | 
T3 | 
152 | 
| zero_val | 
14 | 
1 | 
 | 
 | 
T160 | 
2 | 
 | 
T161 | 
2 | 
 | 
T162 | 
2 | 
Summary for Cross entropy_timer_cross
Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
18 | 
3 | 
15 | 
83.33  | 
3 | 
Automatically Generated Cross Bins for entropy_timer_cross
Element holes
| prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | NUMBER | STATUS | 
| [zero_val] | 
[zero_val] | 
* | 
-- | 
-- | 
2 | 
 | 
Uncovered bins
| prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | NUMBER | STATUS | 
| [lower_val] | 
[zero_val] | 
[auto[0]] | 
0 | 
1 | 
1 | 
 | 
Covered bins
| prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| higher_val | 
higher_val | 
auto[0] | 
46478 | 
1 | 
 | 
 | 
T1 | 
547 | 
 | 
T13 | 
614 | 
 | 
T14 | 
80 | 
| higher_val | 
higher_val | 
auto[1] | 
40734 | 
1 | 
 | 
 | 
T2 | 
10 | 
 | 
T3 | 
36 | 
 | 
T17 | 
31 | 
| higher_val | 
lower_val | 
auto[0] | 
46622 | 
1 | 
 | 
 | 
T1 | 
565 | 
 | 
T13 | 
548 | 
 | 
T14 | 
99 | 
| higher_val | 
lower_val | 
auto[1] | 
40948 | 
1 | 
 | 
 | 
T2 | 
8 | 
 | 
T3 | 
26 | 
 | 
T17 | 
41 | 
| higher_val | 
zero_val | 
auto[0] | 
1 | 
1 | 
 | 
 | 
T161 | 
1 | 
 | 
- | 
- | 
 | 
- | 
- | 
| higher_val | 
zero_val | 
auto[1] | 
2 | 
1 | 
 | 
 | 
T163 | 
1 | 
 | 
T164 | 
1 | 
 | 
- | 
- | 
| lower_val | 
higher_val | 
auto[0] | 
45861 | 
1 | 
 | 
 | 
T1 | 
583 | 
 | 
T13 | 
571 | 
 | 
T14 | 
131 | 
| lower_val | 
higher_val | 
auto[1] | 
40364 | 
1 | 
 | 
 | 
T2 | 
5 | 
 | 
T3 | 
40 | 
 | 
T17 | 
43 | 
| lower_val | 
lower_val | 
auto[0] | 
46089 | 
1 | 
 | 
 | 
T1 | 
546 | 
 | 
T13 | 
559 | 
 | 
T14 | 
109 | 
| lower_val | 
lower_val | 
auto[1] | 
40730 | 
1 | 
 | 
 | 
T2 | 
13 | 
 | 
T3 | 
43 | 
 | 
T17 | 
42 | 
| lower_val | 
zero_val | 
auto[1] | 
1 | 
1 | 
 | 
 | 
T160 | 
1 | 
 | 
- | 
- | 
 | 
- | 
- | 
| zero_val | 
higher_val | 
auto[0] | 
672 | 
1 | 
 | 
 | 
T1 | 
5 | 
 | 
T13 | 
2 | 
 | 
T14 | 
1 | 
| zero_val | 
higher_val | 
auto[1] | 
238 | 
1 | 
 | 
 | 
T17 | 
1 | 
 | 
T165 | 
2 | 
 | 
T166 | 
3 | 
| zero_val | 
lower_val | 
auto[0] | 
701 | 
1 | 
 | 
 | 
T1 | 
8 | 
 | 
T2 | 
1 | 
 | 
T3 | 
1 | 
| zero_val | 
lower_val | 
auto[1] | 
229 | 
1 | 
 | 
 | 
T17 | 
1 | 
 | 
T30 | 
2 | 
 | 
T166 | 
1 |