Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10353	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8927	1			T1	30		T13	30		T14	17
len_5001_7500	14040	1			T1	30		T13	30		T14	17
len_2501_5000	9082	1			T1	30		T13	30		T14	17
len_1025_2500	5370	1			T1	16		T13	16		T14	10
len_769_1024	6501	1			T1	4		T2	8		T3	30
len_513_768	6881	1			T1	2		T2	11		T3	34
len_257_512	21533	1			T1	244		T2	6		T3	38
len_0_256	259398	1			T1	1897		T2	13		T3	48
len_keccak_block_sizes[72]	724	1			T1	3		T13	3		T14	2
len_keccak_block_sizes[104]	627	1			T1	3		T3	1		T13	3
len_keccak_block_sizes[136]	522	1			T1	3		T13	3		T14	2
len_keccak_block_sizes[144]	421	1			T1	3		T13	3		T14	2
len_keccak_block_sizes[168]	326	1			T1	3		T13	3		T37	3
len_1	772	1			T1	3		T2	1		T13	3
len_0	1208	1			T1	3		T13	3		T14	2