Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	707	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5489	1			T2	6		T3	22		T15	13
len_601_800	12738	1			T2	11		T3	49		T15	45
len_401_600	8401	1			T2	5		T3	41		T15	26
len_201_400	16517	1			T2	5		T3	18		T15	11
len_65_200	74409	1			T1	685		T2	3		T3	12
len_min_for_xof_require_squeeze	1004	1			T1	9		T3	2		T13	9
len_keccak_block_sizes[72]	762	1			T1	9		T13	9		T37	5
len_keccak_block_sizes[104]	759	1			T1	9		T13	9		T37	5
len_keccak_block_sizes[136]	766	1			T1	9		T13	9		T37	5
len_keccak_block_sizes[144]	297	1			T37	5		T41	5		T70	5
len_keccak_block_sizes[168]	284	1			T24	1		T37	5		T41	5
len_datapath_width	14260	1			T1	9		T2	1		T3	1
len_2_63	215775	1			T1	1643		T2	4		T3	4
len_1	63	1			T30	1		T194	1		T195	2