Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	667	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5750	1			T1	5		T2	4		T3	9
len_601_800	12830	1			T1	10		T2	8		T3	14
len_401_600	8634	1			T1	9		T2	9		T3	9
len_201_400	16633	1			T1	1		T2	1		T3	4
len_65_200	74562	1			T1	1		T2	2		T3	2
len_min_for_xof_require_squeeze	1015	1			T14	1		T15	1		T79	9
len_keccak_block_sizes[72]	764	1			T79	9		T81	5		T27	1
len_keccak_block_sizes[104]	767	1			T1	1		T15	1		T79	9
len_keccak_block_sizes[136]	759	1			T79	9		T81	5		T69	9
len_keccak_block_sizes[144]	285	1			T81	5		T27	1		T70	5
len_keccak_block_sizes[168]	281	1			T81	5		T70	5		T73	5
len_datapath_width	14184	1			T12	246		T14	2		T15	11
len_2_63	215679	1			T1	25		T2	1		T3	22
len_1	75	1			T179	2		T180	1		T181	1