Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10353	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9138	1			T14	24		T16	19		T17	1
len_5001_7500	14606	1			T14	24		T16	18		T17	14
len_2501_5000	9273	1			T14	24		T16	18		T18	36
len_1025_2500	5474	1			T14	14		T16	11		T17	2
len_769_1024	6259	1			T13	34		T14	2		T16	2
len_513_768	6771	1			T13	42		T14	3		T16	2
len_257_512	21250	1			T13	41		T14	2		T16	2
len_0_256	259492	1			T1	9		T3	9		T13	35
len_keccak_block_sizes[72]	727	1			T14	2		T16	2		T18	3
len_keccak_block_sizes[104]	626	1			T14	2		T16	2		T18	3
len_keccak_block_sizes[136]	525	1			T16	2		T18	3		T91	2
len_keccak_block_sizes[144]	423	1			T18	3		T91	2		T93	3
len_keccak_block_sizes[168]	325	1			T18	3		T93	3		T33	1
len_1	785	1			T13	1		T14	2		T16	2
len_0	1234	1			T14	2		T16	2		T17	1