Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	700	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5628	1			T13	23		T17	1		T52	21
len_601_800	12774	1			T13	70		T17	9		T52	42
len_401_600	8331	1			T13	31		T17	6		T52	18
len_201_400	16720	1			T13	6		T17	5		T18	251
len_65_200	74519	1			T13	13		T18	680		T52	8
len_min_for_xof_require_squeeze	1006	1			T18	10		T52	1		T93	9
len_keccak_block_sizes[72]	774	1			T18	5		T93	9		T193	5
len_keccak_block_sizes[104]	761	1			T18	5		T93	9		T193	5
len_keccak_block_sizes[136]	745	1			T18	5		T93	9		T23	1
len_keccak_block_sizes[144]	283	1			T18	5		T193	5		T194	5
len_keccak_block_sizes[168]	279	1			T18	5		T193	5		T83	1
len_datapath_width	14221	1			T1	3		T3	3		T13	1
len_2_63	215897	1			T1	6		T2	101		T3	6
len_1	69	1			T92	2		T195	1		T83	1