Summary for Variable entropy_edn_mode_enabled
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for entropy_edn_mode_enabled
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
333120 | 
1 | 
 | 
 | 
T1 | 
2 | 
 | 
T2 | 
780 | 
 | 
T3 | 
180 | 
| auto[1] | 
359046 | 
1 | 
 | 
 | 
T1 | 
746 | 
 | 
T13 | 
778 | 
 | 
T16 | 
396 | 
Summary for Variable prescaler_val
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
3 | 
0 | 
3 | 
100.00 | 
User Defined Bins for prescaler_val
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| higher_val | 
172879 | 
1 | 
 | 
 | 
T1 | 
213 | 
 | 
T2 | 
175 | 
 | 
T3 | 
42 | 
| lower_val | 
170832 | 
1 | 
 | 
 | 
T1 | 
172 | 
 | 
T2 | 
206 | 
 | 
T3 | 
45 | 
| zero_val | 
1876 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
1 | 
 | 
T3 | 
1 | 
Summary for Variable wait_timer_val
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
3 | 
0 | 
3 | 
100.00 | 
User Defined Bins for wait_timer_val
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| higher_val | 
347506 | 
1 | 
 | 
 | 
T1 | 
354 | 
 | 
T2 | 
368 | 
 | 
T3 | 
88 | 
| lower_val | 
344650 | 
1 | 
 | 
 | 
T1 | 
394 | 
 | 
T2 | 
412 | 
 | 
T3 | 
92 | 
| zero_val | 
10 | 
1 | 
 | 
 | 
T165 | 
2 | 
 | 
T166 | 
2 | 
 | 
T167 | 
2 | 
Summary for Cross entropy_timer_cross
Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
18 | 
4 | 
14 | 
77.78  | 
4 | 
Automatically Generated Cross Bins for entropy_timer_cross
Element holes
| prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | NUMBER | STATUS | 
| [zero_val] | 
[zero_val] | 
* | 
-- | 
-- | 
2 | 
 | 
Uncovered bins
| prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | NUMBER | STATUS | 
| [higher_val , lower_val] | 
[zero_val] | 
[auto[1]] | 
-- | 
-- | 
2 | 
 | 
Covered bins
| prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| higher_val | 
higher_val | 
auto[0] | 
41707 | 
1 | 
 | 
 | 
T2 | 
79 | 
 | 
T3 | 
18 | 
 | 
T14 | 
41 | 
| higher_val | 
higher_val | 
auto[1] | 
45216 | 
1 | 
 | 
 | 
T1 | 
97 | 
 | 
T13 | 
97 | 
 | 
T16 | 
43 | 
| higher_val | 
lower_val | 
auto[0] | 
41136 | 
1 | 
 | 
 | 
T2 | 
96 | 
 | 
T3 | 
24 | 
 | 
T13 | 
1 | 
| higher_val | 
lower_val | 
auto[1] | 
44819 | 
1 | 
 | 
 | 
T1 | 
116 | 
 | 
T13 | 
106 | 
 | 
T16 | 
52 | 
| higher_val | 
zero_val | 
auto[0] | 
1 | 
1 | 
 | 
 | 
T168 | 
1 | 
 | 
- | 
- | 
 | 
- | 
- | 
| lower_val | 
higher_val | 
auto[0] | 
40843 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
100 | 
 | 
T3 | 
20 | 
| lower_val | 
higher_val | 
auto[1] | 
44610 | 
1 | 
 | 
 | 
T1 | 
81 | 
 | 
T13 | 
104 | 
 | 
T16 | 
46 | 
| lower_val | 
lower_val | 
auto[0] | 
41180 | 
1 | 
 | 
 | 
T2 | 
106 | 
 | 
T3 | 
25 | 
 | 
T14 | 
44 | 
| lower_val | 
lower_val | 
auto[1] | 
44198 | 
1 | 
 | 
 | 
T1 | 
90 | 
 | 
T13 | 
90 | 
 | 
T16 | 
57 | 
| lower_val | 
zero_val | 
auto[0] | 
1 | 
1 | 
 | 
 | 
T167 | 
1 | 
 | 
- | 
- | 
 | 
- | 
- | 
| zero_val | 
higher_val | 
auto[0] | 
707 | 
1 | 
 | 
 | 
T1 | 
1 | 
 | 
T2 | 
1 | 
 | 
T3 | 
1 | 
| zero_val | 
higher_val | 
auto[1] | 
273 | 
1 | 
 | 
 | 
T13 | 
1 | 
 | 
T18 | 
2 | 
 | 
T65 | 
2 | 
| zero_val | 
lower_val | 
auto[0] | 
661 | 
1 | 
 | 
 | 
T13 | 
1 | 
 | 
T14 | 
1 | 
 | 
T18 | 
1 | 
| zero_val | 
lower_val | 
auto[1] | 
235 | 
1 | 
 | 
 | 
T13 | 
1 | 
 | 
T18 | 
2 | 
 | 
T19 | 
2 |