Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10353	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9147	1			T3	38		T12	40		T15	17
len_5001_7500	14800	1			T3	36		T12	99		T15	17
len_2501_5000	9357	1			T3	36		T12	13		T15	17
len_1025_2500	5474	1			T3	22		T12	7		T15	10
len_769_1024	6262	1			T2	4		T3	4		T12	17
len_513_768	6800	1			T1	3		T2	6		T3	4
len_257_512	21299	1			T1	1		T2	3		T3	52
len_0_256	258977	1			T2	3		T3	2017		T12	124
len_keccak_block_sizes[72]	720	1			T3	3		T15	2		T16	3
len_keccak_block_sizes[104]	625	1			T3	3		T15	2		T16	3
len_keccak_block_sizes[136]	521	1			T3	3		T15	2		T16	3
len_keccak_block_sizes[144]	416	1			T3	3		T15	2		T16	3
len_keccak_block_sizes[168]	318	1			T3	3		T16	3		T18	1
len_1	759	1			T3	3		T15	2		T16	3
len_0	1230	1			T3	3		T12	8		T15	2