Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10352	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8927	1			T2	38		T12	24		T14	36
len_5001_7500	14107	1			T2	36		T12	24		T13	33
len_2501_5000	9222	1			T2	36		T12	24		T13	34
len_1025_2500	5419	1			T2	22		T12	14		T13	20
len_769_1024	6423	1			T2	4		T3	19		T12	2
len_513_768	6750	1			T2	4		T3	16		T12	3
len_257_512	21294	1			T2	52		T3	16		T12	2
len_0_256	257373	1			T1	76		T2	2017		T3	14
len_keccak_block_sizes[72]	727	1			T2	3		T12	2		T13	2
len_keccak_block_sizes[104]	627	1			T2	3		T12	2		T15	2
len_keccak_block_sizes[136]	526	1			T2	3		T15	2		T17	2
len_keccak_block_sizes[144]	419	1			T2	3		T15	2		T17	2
len_keccak_block_sizes[168]	315	1			T2	3		T64	3		T164	3
len_1	746	1			T1	1		T2	3		T12	2
len_0	1198	1			T1	2		T2	3		T12	2