Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10356	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8887	1			T2	19		T14	38		T15	20
len_5001_7500	14316	1			T2	18		T14	36		T15	47
len_2501_5000	9269	1			T2	18		T14	36		T15	13
len_1025_2500	5445	1			T2	11		T14	22		T15	5
len_769_1024	6606	1			T1	14		T2	2		T3	16
len_513_768	7076	1			T1	25		T2	2		T3	14
len_257_512	21433	1			T1	17		T2	2		T3	19
len_0_256	258970	1			T1	32		T2	274		T3	16
len_keccak_block_sizes[72]	731	1			T2	2		T14	3		T16	2
len_keccak_block_sizes[104]	625	1			T2	2		T14	3		T17	2
len_keccak_block_sizes[136]	515	1			T2	2		T14	3		T17	2
len_keccak_block_sizes[144]	419	1			T14	3		T84	3		T105	2
len_keccak_block_sizes[168]	317	1			T14	3		T84	3		T169	3
len_1	764	1			T2	2		T14	3		T16	2
len_0	1211	1			T2	2		T14	3		T15	3