Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10351	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8976	1			T1	39		T2	30		T12	19
len_5001_7500	14303	1			T1	81		T2	30		T12	18
len_2501_5000	9241	1			T1	26		T2	30		T12	18
len_1025_2500	5401	1			T1	14		T2	16		T12	11
len_769_1024	6633	1			T1	1		T2	4		T3	35
len_513_768	6925	1			T1	1		T2	2		T3	52
len_257_512	21363	1			T1	3		T2	244		T3	36
len_0_256	257758	1			T1	23		T2	1897		T3	49
len_keccak_block_sizes[72]	723	1			T2	3		T12	2		T13	2
len_keccak_block_sizes[104]	625	1			T2	3		T12	2		T13	2
len_keccak_block_sizes[136]	522	1			T2	3		T12	2		T13	2
len_keccak_block_sizes[144]	423	1			T2	3		T14	2		T16	1
len_keccak_block_sizes[168]	321	1			T2	3		T86	3		T162	3
len_1	744	1			T2	3		T12	2		T13	2
len_0	1147	1			T1	4		T2	3		T12	2