Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	710	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5647	1			T1	23		T3	33		T15	28
len_601_800	12920	1			T1	77		T3	58		T15	48
len_401_600	8475	1			T1	45		T3	35		T15	36
len_201_400	16650	1			T1	18		T3	22		T15	24
len_65_200	73621	1			T1	12		T2	685		T3	11
len_min_for_xof_require_squeeze	1000	1			T2	9		T3	1		T15	1
len_keccak_block_sizes[72]	742	1			T2	9		T86	9		T162	5
len_keccak_block_sizes[104]	756	1			T1	1		T2	9		T86	9
len_keccak_block_sizes[136]	746	1			T2	9		T86	9		T91	1
len_keccak_block_sizes[144]	283	1			T162	5		T27	1		T81	1
len_keccak_block_sizes[168]	277	1			T15	1		T162	5		T29	1
len_datapath_width	14131	1			T1	2		T2	9		T16	1
len_2_63	214579	1			T1	7		T2	1643		T3	9
len_1	50	1			T183	1		T81	1		T184	1