Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
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Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 0 15 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
msg_len 15 0 15 100.00 100 1 1 0


Summary for Variable msg_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 15 0 15 100.00


User Defined Bins for msg_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 10351 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_7501_10000 8949 1 T13 17 T14 35 T19 2
len_5001_7500 14363 1 T13 17 T14 105 T19 11
len_2501_5000 9261 1 T13 17 T14 16 T19 1
len_1025_2500 5415 1 T13 10 T14 10 T19 1
len_769_1024 6101 1 T3 5 T13 2 T14 1
len_513_768 6566 1 T3 10 T13 2 T14 1
len_257_512 21200 1 T3 4 T13 2 T14 2
len_0_256 258347 1 T1 9 T2 32 T3 4
len_keccak_block_sizes[72] 724 1 T13 2 T38 2 T39 2
len_keccak_block_sizes[104] 620 1 T13 2 T38 2 T39 2
len_keccak_block_sizes[136] 522 1 T13 2 T39 2 T25 1
len_keccak_block_sizes[144] 422 1 T13 2 T39 2 T71 2
len_keccak_block_sizes[168] 323 1 T73 3 T187 1 T51 1
len_1 752 1 T13 2 T17 1 T38 2
len_0 1185 1 T13 2 T14 2 T38 2

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