Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	665	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5412	1			T3	3		T14	26		T16	4
len_601_800	12328	1			T3	6		T14	71		T16	19
len_401_600	8261	1			T3	3		T14	46		T16	8
len_201_400	16557	1			T3	3		T14	20		T16	3
len_65_200	74024	1			T2	18		T3	6		T14	15
len_min_for_xof_require_squeeze	1003	1			T73	10		T189	1		T136	1
len_keccak_block_sizes[72]	767	1			T3	1		T73	5		T40	1
len_keccak_block_sizes[104]	757	1			T14	1		T73	5		T189	1
len_keccak_block_sizes[136]	753	1			T73	5		T30	1		T189	1
len_keccak_block_sizes[144]	281	1			T73	5		T189	2		T190	5
len_keccak_block_sizes[168]	288	1			T14	1		T72	1		T73	5
len_datapath_width	14136	1			T1	3		T2	2		T14	3
len_2_63	214827	1			T1	6		T2	12		T3	2
len_1	56	1			T189	1		T51	1		T86	1