Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10350	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9058	1			T2	38		T3	2		T13	14
len_5001_7500	14566	1			T2	36		T3	21		T13	37
len_2501_5000	9261	1			T2	36		T3	7		T13	5
len_1025_2500	5408	1			T2	22		T3	3		T13	4
len_769_1024	6065	1			T2	4		T12	17		T13	9
len_513_768	6485	1			T2	4		T3	1		T12	12
len_257_512	21086	1			T2	52		T12	10		T13	8
len_0_256	257642	1			T2	2017		T3	5		T12	16
len_keccak_block_sizes[72]	722	1			T2	3		T12	1		T14	2
len_keccak_block_sizes[104]	614	1			T2	3		T17	3		T75	3
len_keccak_block_sizes[136]	517	1			T2	3		T17	3		T34	1
len_keccak_block_sizes[144]	418	1			T2	3		T17	3		T75	3
len_keccak_block_sizes[168]	324	1			T2	3		T17	3		T24	1
len_1	753	1			T2	3		T14	2		T16	3
len_0	1210	1			T2	3		T3	1		T13	7