Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
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Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 0 15 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
msg_len 15 0 15 100.00 100 1 1 0


Summary for Variable msg_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 15 0 15 100.00


User Defined Bins for msg_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 10351 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_7501_10000 9077 1 T2 12 T14 17 T15 8
len_5001_7500 14639 1 T2 27 T14 17 T15 15
len_2501_5000 9356 1 T2 6 T14 17 T15 6
len_1025_2500 5433 1 T2 2 T14 10 T15 2
len_769_1024 5932 1 T11 37 T13 4 T14 2
len_513_768 6434 1 T2 2 T11 24 T13 1
len_257_512 20931 1 T11 36 T13 4 T14 2
len_0_256 257897 1 T2 3 T11 26 T12 9
len_keccak_block_sizes[72] 721 1 T14 2 T17 2 T86 3
len_keccak_block_sizes[104] 621 1 T14 2 T15 1 T17 2
len_keccak_block_sizes[136] 513 1 T14 2 T86 3 T64 2
len_keccak_block_sizes[144] 418 1 T14 2 T86 3 T180 3
len_keccak_block_sizes[168] 324 1 T86 3 T24 1 T180 3
len_1 757 1 T14 2 T17 2 T86 3
len_0 1209 1 T14 2 T17 2 T86 3

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