Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
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Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 0 15 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
msg_len 15 0 15 100.00 100 1 1 0


Summary for Variable msg_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 15 0 15 100.00


User Defined Bins for msg_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 10351 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_7501_10000 8907 1 T1 14 T13 13 T15 26
len_5001_7500 14142 1 T1 36 T13 18 T15 78
len_2501_5000 9176 1 T1 12 T13 2 T15 13
len_1025_2500 5351 1 T1 4 T13 1 T15 8
len_769_1024 6499 1 T1 2 T3 28 T13 31
len_513_768 6852 1 T1 1 T3 28 T13 26
len_257_512 21415 1 T1 2 T3 46 T13 20
len_0_256 258315 1 T1 6 T3 45 T13 42
len_keccak_block_sizes[72] 719 1 T18 2 T19 2 T37 2
len_keccak_block_sizes[104] 627 1 T18 2 T19 2 T37 2
len_keccak_block_sizes[136] 518 1 T18 2 T37 2 T62 2
len_keccak_block_sizes[144] 426 1 T30 1 T98 3 T179 3
len_keccak_block_sizes[168] 330 1 T29 1 T30 1 T98 3
len_1 759 1 T18 2 T19 2 T37 2
len_0 1199 1 T15 6 T18 2 T19 2

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