Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10352	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8893	1			T2	30		T15	24		T16	24
len_5001_7500	14148	1			T2	30		T9	33		T15	24
len_2501_5000	9175	1			T2	30		T9	34		T15	24
len_1025_2500	5389	1			T2	16		T9	20		T15	14
len_769_1024	6383	1			T2	4		T9	4		T15	2
len_513_768	6936	1			T2	2		T9	3		T14	1
len_257_512	21393	1			T2	244		T9	4		T14	2
len_0_256	258339	1			T2	1897		T4	9		T9	148
len_keccak_block_sizes[72]	718	1			T2	3		T9	2		T15	2
len_keccak_block_sizes[104]	619	1			T2	3		T15	2		T16	2
len_keccak_block_sizes[136]	524	1			T2	3		T99	2		T128	3
len_keccak_block_sizes[144]	429	1			T2	3		T27	1		T99	2
len_keccak_block_sizes[168]	328	1			T2	3		T128	3		T191	3
len_1	754	1			T2	3		T9	2		T15	2
len_0	1195	1			T2	3		T9	2		T15	2