Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10351	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8982	1			T1	17		T3	6		T14	7
len_5001_7500	14248	1			T1	17		T3	15		T14	12
len_2501_5000	9241	1			T1	17		T3	6		T14	2
len_1025_2500	5363	1			T1	10		T3	6		T14	1
len_769_1024	6196	1			T1	2		T3	1		T13	28
len_513_768	6550	1			T1	2		T3	1		T13	30
len_257_512	21051	1			T1	2		T3	1		T13	25
len_0_256	257515	1			T1	290		T3	8		T13	25
len_keccak_block_sizes[72]	724	1			T1	2		T15	2		T16	2
len_keccak_block_sizes[104]	622	1			T1	2		T13	1		T16	2
len_keccak_block_sizes[136]	512	1			T1	2		T13	1		T16	2
len_keccak_block_sizes[144]	420	1			T1	2		T13	1		T16	2
len_keccak_block_sizes[168]	322	1			T104	3		T106	3		T108	3
len_1	746	1			T1	2		T15	2		T16	2
len_0	1218	1			T1	2		T3	2		T15	2