Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10353	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9141	1			T1	19		T2	17		T14	30
len_5001_7500	14634	1			T1	44		T2	17		T14	30
len_2501_5000	9251	1			T1	7		T2	17		T14	30
len_1025_2500	5412	1			T2	10		T14	16		T16	10
len_769_1024	6239	1			T1	32		T2	2		T4	23
len_513_768	6561	1			T1	48		T2	2		T4	34
len_257_512	21036	1			T1	49		T2	2		T4	35
len_0_256	258503	1			T1	102		T2	290		T4	39
len_keccak_block_sizes[72]	726	1			T2	2		T14	3		T16	2
len_keccak_block_sizes[104]	622	1			T1	1		T2	2		T14	3
len_keccak_block_sizes[136]	516	1			T2	2		T14	3		T16	2
len_keccak_block_sizes[144]	417	1			T1	1		T2	2		T14	3
len_keccak_block_sizes[168]	322	1			T14	3		T88	3		T89	3
len_1	757	1			T2	2		T14	3		T16	2
len_0	1280	1			T1	1		T2	2		T14	3