Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	657	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5525	1			T1	39		T4	22		T13	8
len_601_800	12530	1			T1	96		T4	50		T13	22
len_401_600	8390	1			T1	59		T4	37		T13	13
len_201_400	16497	1			T1	33		T4	11		T13	6
len_65_200	74186	1			T1	26		T4	6		T13	4
len_min_for_xof_require_squeeze	1003	1			T1	1		T14	9		T88	10
len_keccak_block_sizes[72]	748	1			T1	1		T14	9		T88	5
len_keccak_block_sizes[104]	767	1			T14	9		T88	5		T89	5
len_keccak_block_sizes[136]	764	1			T4	1		T14	9		T88	5
len_keccak_block_sizes[144]	283	1			T4	1		T88	5		T89	5
len_keccak_block_sizes[168]	283	1			T88	5		T89	5		T124	1
len_datapath_width	14156	1			T1	12		T14	9		T88	5
len_2_63	214977	1			T1	85		T2	390		T4	65
len_1	58	1			T94	5		T124	2		T114	2