Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10351	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9021	1			T1	8		T3	17		T13	19
len_5001_7500	14346	1			T1	22		T3	17		T13	18
len_2501_5000	9307	1			T1	4		T3	17		T13	18
len_1025_2500	5464	1			T1	3		T3	10		T13	11
len_769_1024	6031	1			T1	1		T3	2		T4	4
len_513_768	6255	1			T1	4		T3	2		T4	2
len_257_512	20896	1			T1	1		T3	2		T4	7
len_0_256	257231	1			T1	82		T3	290		T4	1
len_keccak_block_sizes[72]	723	1			T3	2		T13	2		T14	2
len_keccak_block_sizes[104]	623	1			T3	2		T13	2		T17	2
len_keccak_block_sizes[136]	517	1			T3	2		T13	2		T17	2
len_keccak_block_sizes[144]	419	1			T3	2		T17	2		T69	3
len_keccak_block_sizes[168]	317	1			T69	3		T193	3		T172	3
len_1	747	1			T3	2		T13	2		T14	2
len_0	1185	1			T1	3		T3	2		T13	2