Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	622	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5308	1			T1	8		T4	1		T15	10
len_601_800	12110	1			T1	22		T4	3		T15	39
len_401_600	8096	1			T1	10		T4	8		T15	26
len_201_400	16375	1			T1	3		T15	16		T16	14
len_65_200	73601	1			T1	27		T15	5		T16	6
len_min_for_xof_require_squeeze	993	1			T19	1		T24	1		T69	10
len_keccak_block_sizes[72]	746	1			T16	1		T19	3		T69	5
len_keccak_block_sizes[104]	763	1			T1	1		T19	1		T27	1
len_keccak_block_sizes[136]	745	1			T19	1		T24	1		T69	5
len_keccak_block_sizes[144]	286	1			T67	1		T69	5		T172	5
len_keccak_block_sizes[168]	288	1			T15	1		T27	1		T69	5
len_datapath_width	14077	1			T1	11		T14	246		T15	1
len_2_63	214403	1			T1	43		T3	390		T4	11
len_1	37	1			T15	1		T194	1		T195	1