Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10352	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8912	1			T2	30		T13	34		T14	38
len_5001_7500	14298	1			T2	30		T3	33		T13	92
len_2501_5000	9245	1			T2	30		T3	34		T13	17
len_1025_2500	5430	1			T2	16		T3	20		T13	12
len_769_1024	5914	1			T2	4		T3	4		T13	2
len_513_768	6421	1			T2	2		T3	3		T13	1
len_257_512	20923	1			T2	244		T3	4		T13	1
len_0_256	257939	1			T1	144		T2	1897		T3	148
len_keccak_block_sizes[72]	716	1			T2	3		T3	2		T14	3
len_keccak_block_sizes[104]	623	1			T2	3		T14	3		T15	2
len_keccak_block_sizes[136]	526	1			T2	3		T14	3		T15	2
len_keccak_block_sizes[144]	413	1			T2	3		T14	3		T15	2
len_keccak_block_sizes[168]	322	1			T2	3		T14	3		T170	3
len_1	753	1			T1	1		T2	3		T3	2
len_0	1192	1			T1	2		T2	3		T3	2