Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	662	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5309	1			T13	24		T18	13		T23	6
len_601_800	11985	1			T13	71		T18	33		T23	17
len_401_600	7960	1			T13	47		T18	21		T23	7
len_201_400	16254	1			T13	14		T14	251		T18	5
len_65_200	74061	1			T1	74		T2	685		T13	8
len_min_for_xof_require_squeeze	1003	1			T2	9		T14	10		T170	9
len_keccak_block_sizes[72]	762	1			T1	1		T2	9		T14	5
len_keccak_block_sizes[104]	769	1			T1	1		T2	9		T14	5
len_keccak_block_sizes[136]	769	1			T2	9		T14	5		T24	1
len_keccak_block_sizes[144]	287	1			T1	1		T14	5		T82	1
len_keccak_block_sizes[168]	288	1			T1	1		T14	5		T172	5
len_datapath_width	14139	1			T1	6		T2	9		T3	246
len_2_63	214372	1			T1	63		T2	1643		T13	10
len_1	62	1			T1	1		T84	4		T45	2