Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10351	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9011	1			T2	17		T12	23		T14	24
len_5001_7500	14545	1			T1	33		T2	17		T3	33
len_2501_5000	9331	1			T1	34		T2	17		T3	34
len_1025_2500	5447	1			T1	20		T2	10		T3	20
len_769_1024	6290	1			T1	4		T2	2		T3	4
len_513_768	6558	1			T1	3		T2	2		T3	3
len_257_512	21041	1			T1	4		T2	2		T3	4
len_0_256	258152	1			T1	148		T2	290		T3	148
len_keccak_block_sizes[72]	730	1			T1	2		T2	2		T3	2
len_keccak_block_sizes[104]	626	1			T2	2		T14	2		T17	2
len_keccak_block_sizes[136]	519	1			T2	2		T17	2		T40	2
len_keccak_block_sizes[144]	421	1			T2	2		T40	2		T88	2
len_keccak_block_sizes[168]	330	1			T172	1		T173	3		T56	1
len_1	749	1			T1	2		T2	2		T3	2
len_0	1238	1			T1	2		T2	2		T3	2