Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10350	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9234	1			T2	3		T15	35		T40	11
len_5001_7500	14989	1			T2	16		T3	33		T15	81
len_2501_5000	9419	1			T2	4		T3	34		T15	20
len_1025_2500	5497	1			T2	2		T3	20		T15	8
len_769_1024	6786	1			T1	30		T3	4		T15	3
len_513_768	7194	1			T1	35		T2	1		T3	3
len_257_512	21800	1			T1	36		T3	4		T15	2
len_0_256	259052	1			T1	46		T2	2		T3	148
len_keccak_block_sizes[72]	721	1			T3	2		T114	2		T92	2
len_keccak_block_sizes[104]	627	1			T92	2		T117	2		T118	2
len_keccak_block_sizes[136]	531	1			T1	1		T117	2		T119	3
len_keccak_block_sizes[144]	441	1			T119	3		T159	3		T83	3
len_keccak_block_sizes[168]	333	1			T119	3		T159	3		T131	1
len_1	750	1			T1	1		T3	2		T114	2
len_0	1191	1			T2	1		T3	2		T15	1