Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	730	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	6010	1			T1	24		T2	4		T15	26
len_601_800	13662	1			T1	54		T2	11		T15	57
len_401_600	9060	1			T1	37		T2	10		T15	43
len_201_400	16878	1			T1	18		T2	3		T15	18
len_65_200	74412	1			T1	3		T15	13		T16	6
len_min_for_xof_require_squeeze	1017	1			T87	2		T23	1		T119	9
len_keccak_block_sizes[72]	752	1			T87	1		T119	9		T159	9
len_keccak_block_sizes[104]	753	1			T89	1		T119	9		T121	3
len_keccak_block_sizes[136]	747	1			T89	1		T119	9		T121	1
len_keccak_block_sizes[144]	292	1			T121	1		T42	1		T83	5
len_keccak_block_sizes[168]	287	1			T81	1		T83	5		T183	5
len_datapath_width	14164	1			T3	246		T16	1		T17	2
len_2_63	215906	1			T1	7		T15	4		T16	80
len_1	47	1			T25	1		T138	1		T43	1