Summary for Variable entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for entropy_edn_mode_enabled
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
339192 |
1 |
|
|
T1 |
2 |
|
T2 |
18 |
|
T3 |
18 |
auto[1] |
356586 |
1 |
|
|
T1 |
4528 |
|
T14 |
558 |
|
T15 |
16 |
Summary for Variable prescaler_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for prescaler_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
173459 |
1 |
|
|
T1 |
1006 |
|
T2 |
7 |
|
T3 |
8 |
lower_val |
171801 |
1 |
|
|
T1 |
1143 |
|
T2 |
8 |
|
T3 |
4 |
zero_val |
1838 |
1 |
|
|
T1 |
3 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable wait_timer_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for wait_timer_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
347800 |
1 |
|
|
T1 |
2242 |
|
T2 |
10 |
|
T3 |
10 |
lower_val |
347974 |
1 |
|
|
T1 |
2288 |
|
T2 |
8 |
|
T3 |
8 |
zero_val |
4 |
1 |
|
|
T165 |
2 |
|
T166 |
2 |
|
- |
- |
Summary for Cross entropy_timer_cross
Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
18 |
4 |
14 |
77.78 |
4 |
Automatically Generated Cross Bins for entropy_timer_cross
Element holes
prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | NUMBER | STATUS |
[lower_val , zero_val] |
[zero_val] |
* |
-- |
-- |
4 |
|
Covered bins
prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
higher_val |
auto[0] |
42573 |
1 |
|
|
T1 |
1 |
|
T2 |
5 |
|
T3 |
5 |
higher_val |
higher_val |
auto[1] |
44269 |
1 |
|
|
T1 |
513 |
|
T14 |
61 |
|
T15 |
1 |
higher_val |
lower_val |
auto[0] |
41941 |
1 |
|
|
T2 |
2 |
|
T3 |
3 |
|
T13 |
9 |
higher_val |
lower_val |
auto[1] |
44673 |
1 |
|
|
T1 |
492 |
|
T14 |
73 |
|
T15 |
3 |
higher_val |
zero_val |
auto[0] |
2 |
1 |
|
|
T166 |
2 |
|
- |
- |
|
- |
- |
higher_val |
zero_val |
auto[1] |
1 |
1 |
|
|
T165 |
1 |
|
- |
- |
|
- |
- |
lower_val |
higher_val |
auto[0] |
41988 |
1 |
|
|
T2 |
5 |
|
T3 |
1 |
|
T13 |
11 |
lower_val |
higher_val |
auto[1] |
43863 |
1 |
|
|
T1 |
569 |
|
T14 |
80 |
|
T15 |
2 |
lower_val |
lower_val |
auto[0] |
41878 |
1 |
|
|
T2 |
3 |
|
T3 |
3 |
|
T13 |
9 |
lower_val |
lower_val |
auto[1] |
44072 |
1 |
|
|
T1 |
574 |
|
T14 |
71 |
|
T4 |
9 |
zero_val |
higher_val |
auto[0] |
697 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T13 |
1 |
zero_val |
higher_val |
auto[1] |
231 |
1 |
|
|
T1 |
1 |
|
T14 |
1 |
|
T36 |
2 |
zero_val |
lower_val |
auto[0] |
657 |
1 |
|
|
T2 |
1 |
|
T14 |
1 |
|
T16 |
3 |
zero_val |
lower_val |
auto[1] |
253 |
1 |
|
|
T1 |
1 |
|
T14 |
1 |
|
T36 |
2 |