Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10350	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8866	1			T1	38		T14	27		T16	38
len_5001_7500	14235	1			T1	36		T14	70		T16	36
len_2501_5000	9140	1			T1	36		T14	22		T16	36
len_1025_2500	5378	1			T1	22		T14	3		T16	22
len_769_1024	6402	1			T1	4		T13	9		T14	72
len_513_768	6727	1			T1	4		T13	10		T14	67
len_257_512	21307	1			T1	52		T13	11		T14	65
len_0_256	258249	1			T1	2017		T2	9		T3	9
len_keccak_block_sizes[72]	726	1			T1	3		T16	3		T35	2
len_keccak_block_sizes[104]	629	1			T1	3		T16	3		T35	2
len_keccak_block_sizes[136]	521	1			T1	3		T16	3		T35	2
len_keccak_block_sizes[144]	422	1			T1	3		T16	3		T36	3
len_keccak_block_sizes[168]	323	1			T1	3		T16	3		T36	3
len_1	765	1			T1	3		T16	3		T35	2
len_0	1150	1			T1	3		T14	4		T16	3