Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
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Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 0 15 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
msg_len 15 0 15 100.00 100 1 1 0


Summary for Variable msg_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 15 0 15 100.00


User Defined Bins for msg_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 10350 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_7501_10000 8991 1 T13 36 T17 30 T39 38
len_5001_7500 14564 1 T2 33 T13 93 T17 30
len_2501_5000 9286 1 T2 34 T13 24 T17 30
len_1025_2500 5396 1 T2 20 T13 12 T17 16
len_769_1024 5996 1 T2 4 T13 3 T16 20
len_513_768 6359 1 T2 3 T13 4 T16 36
len_257_512 20742 1 T2 4 T13 2 T16 26
len_0_256 258472 1 T2 148 T3 30 T4 9
len_keccak_block_sizes[72] 724 1 T2 2 T17 3 T39 3
len_keccak_block_sizes[104] 617 1 T17 3 T39 3 T41 1
len_keccak_block_sizes[136] 518 1 T17 3 T39 3 T24 1
len_keccak_block_sizes[144] 420 1 T17 3 T39 3 T164 3
len_keccak_block_sizes[168] 318 1 T17 3 T39 3 T164 3
len_1 756 1 T2 2 T17 3 T39 3
len_0 1266 1 T2 2 T3 1 T13 2

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