Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	600	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5279	1			T13	26		T16	19		T22	2
len_601_800	12193	1			T13	65		T16	34		T22	5
len_401_600	7917	1			T13	52		T16	31		T22	1
len_201_400	16334	1			T13	26		T16	10		T22	1
len_65_200	74217	1			T3	13		T13	12		T15	87
len_min_for_xof_require_squeeze	1007	1			T3	1		T13	1		T17	9
len_keccak_block_sizes[72]	747	1			T13	1		T15	1		T17	9
len_keccak_block_sizes[104]	768	1			T15	1		T17	9		T22	2
len_keccak_block_sizes[136]	749	1			T13	1		T15	2		T17	9
len_keccak_block_sizes[144]	281	1			T39	5		T164	5		T167	5
len_keccak_block_sizes[168]	284	1			T39	5		T164	5		T120	1
len_datapath_width	14180	1			T2	246		T3	2		T4	3
len_2_63	214358	1			T3	15		T4	6		T13	7
len_1	57	1			T15	2		T168	3		T81	1