Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10353	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9340	1			T3	30		T18	35		T40	24
len_5001_7500	14849	1			T1	33		T3	30		T14	33
len_2501_5000	9376	1			T1	34		T3	30		T14	34
len_1025_2500	5512	1			T1	20		T3	16		T14	20
len_769_1024	6507	1			T1	4		T3	4		T4	25
len_513_768	6858	1			T1	3		T3	2		T4	21
len_257_512	21370	1			T1	4		T3	244		T4	21
len_0_256	258393	1			T1	148		T3	1897		T4	15
len_keccak_block_sizes[72]	721	1			T1	2		T3	3		T14	2
len_keccak_block_sizes[104]	619	1			T3	3		T16	1		T40	2
len_keccak_block_sizes[136]	524	1			T3	3		T84	3		T79	3
len_keccak_block_sizes[144]	422	1			T3	3		T84	3		T79	3
len_keccak_block_sizes[168]	322	1			T3	3		T25	1		T84	3
len_1	752	1			T1	2		T3	3		T14	2
len_0	1240	1			T1	2		T3	3		T14	2