Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	643	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5829	1			T4	18		T15	27		T16	22
len_601_800	13193	1			T4	32		T15	48		T16	59
len_401_600	8878	1			T4	15		T15	42		T16	35
len_201_400	16761	1			T4	4		T15	11		T16	18
len_65_200	74012	1			T3	685		T4	8		T15	10
len_min_for_xof_require_squeeze	996	1			T3	9		T84	10		T79	9
len_keccak_block_sizes[72]	761	1			T3	9		T84	5		T23	1
len_keccak_block_sizes[104]	766	1			T3	9		T18	1		T84	5
len_keccak_block_sizes[136]	753	1			T3	9		T84	5		T79	9
len_keccak_block_sizes[144]	285	1			T84	5		T169	5		T194	1
len_keccak_block_sizes[168]	285	1			T84	5		T169	5		T194	1
len_datapath_width	14165	1			T1	246		T3	9		T4	1
len_2_63	215033	1			T3	1643		T4	4		T15	53
len_1	56	1			T51	1		T23	1		T194	1