Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10350	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9304	1			T13	30		T16	27		T17	5
len_5001_7500	15264	1			T13	30		T16	95		T17	27
len_2501_5000	9404	1			T13	30		T16	14		T17	4
len_1025_2500	5499	1			T13	16		T16	9		T17	2
len_769_1024	6569	1			T1	35		T13	4		T17	8
len_513_768	7007	1			T1	30		T13	2		T16	5
len_257_512	21482	1			T1	49		T13	244		T16	1
len_0_256	259082	1			T1	33		T13	1897		T15	9
len_keccak_block_sizes[72]	715	1			T13	3		T119	2		T93	3
len_keccak_block_sizes[104]	622	1			T13	3		T25	1		T119	2
len_keccak_block_sizes[136]	507	1			T13	3		T119	2		T93	3
len_keccak_block_sizes[144]	420	1			T13	3		T93	3		T38	1
len_keccak_block_sizes[168]	324	1			T13	3		T93	3		T21	1
len_1	760	1			T13	3		T119	2		T93	3
len_0	1274	1			T13	3		T16	4		T17	4