Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	727	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5975	1			T1	34		T16	26		T17	9
len_601_800	13633	1			T1	49		T16	57		T17	27
len_401_600	9025	1			T1	43		T16	42		T17	19
len_201_400	16799	1			T1	11		T16	21		T17	9
len_65_200	74353	1			T1	9		T13	685		T16	18
len_min_for_xof_require_squeeze	995	1			T13	9		T93	9		T82	10
len_keccak_block_sizes[72]	754	1			T13	9		T93	9		T21	1
len_keccak_block_sizes[104]	750	1			T13	9		T16	1		T17	2
len_keccak_block_sizes[136]	761	1			T13	9		T16	1		T93	9
len_keccak_block_sizes[144]	283	1			T17	1		T19	1		T82	5
len_keccak_block_sizes[168]	292	1			T17	1		T82	5		T109	1
len_datapath_width	14196	1			T13	9		T15	3		T16	1
len_2_63	215610	1			T1	53		T13	1643		T15	6
len_1	51	1			T175	1		T176	1		T177	1