Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10354	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9194	1			T3	9		T13	20		T18	19
len_5001_7500	15030	1			T3	26		T13	57		T17	33
len_2501_5000	9353	1			T3	6		T13	6		T17	34
len_1025_2500	5516	1			T3	2		T13	5		T17	20
len_769_1024	6156	1			T3	3		T15	1		T17	4
len_513_768	6557	1			T3	3		T13	5		T17	3
len_257_512	21014	1			T3	1		T13	1		T15	2
len_0_256	258755	1			T2	9		T3	3		T12	9
len_keccak_block_sizes[72]	715	1			T17	2		T18	2		T42	3
len_keccak_block_sizes[104]	618	1			T18	2		T42	3		T43	2
len_keccak_block_sizes[136]	521	1			T18	2		T42	3		T43	2
len_keccak_block_sizes[144]	430	1			T29	2		T42	3		T43	2
len_keccak_block_sizes[168]	332	1			T29	1		T42	3		T105	3
len_1	761	1			T17	2		T18	2		T41	1
len_0	1202	1			T3	1		T13	3		T17	2