Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10353	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9038	1			T9	38		T15	38		T16	19
len_5001_7500	14311	1			T9	36		T15	36		T16	18
len_2501_5000	9240	1			T9	36		T15	36		T16	18
len_1025_2500	5405	1			T9	22		T15	22		T16	11
len_769_1024	6053	1			T3	13		T9	4		T13	40
len_513_768	6483	1			T3	17		T9	4		T13	37
len_257_512	20950	1			T3	15		T9	52		T13	40
len_0_256	257519	1			T1	143		T3	19		T9	2017
len_keccak_block_sizes[72]	717	1			T9	3		T15	3		T16	2
len_keccak_block_sizes[104]	611	1			T9	3		T15	3		T16	2
len_keccak_block_sizes[136]	521	1			T9	3		T15	3		T16	2
len_keccak_block_sizes[144]	420	1			T9	3		T15	3		T29	2
len_keccak_block_sizes[168]	329	1			T9	3		T15	3		T118	3
len_1	750	1			T1	1		T9	3		T15	3
len_0	1187	1			T1	4		T9	3		T13	1