Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	713	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5480	1			T12	13		T16	25		T21	18
len_601_800	12373	1			T12	18		T16	45		T21	58
len_401_600	8410	1			T12	7		T16	27		T21	43
len_201_400	16598	1			T12	6		T16	21		T21	16
len_65_200	74326	1			T3	685		T16	10		T37	9
len_min_for_xof_require_squeeze	1010	1			T3	9		T38	1		T87	10
len_keccak_block_sizes[72]	766	1			T3	9		T87	5		T114	9
len_keccak_block_sizes[104]	753	1			T3	9		T38	1		T87	5
len_keccak_block_sizes[136]	764	1			T3	9		T38	1		T87	5
len_keccak_block_sizes[144]	281	1			T87	5		T190	5		T74	5
len_keccak_block_sizes[168]	293	1			T37	1		T38	1		T87	5
len_datapath_width	14102	1			T2	3		T3	9		T14	3
len_2_63	215026	1			T1	374		T2	6		T3	1643
len_1	45	1			T43	1		T191	1		T192	1